1. Field of Invention
The present invention relates to an output stage for Class D amplifiers and the like, including a power supply that is floating with respect to ground, or any other reference except the supply pins.
2. Description of Prior Art
Class D amplifiers are desirable in audio power amplifiers and the like, because they are efficient, and can handle high power signals. The high efficiency allows for smaller power supplies, and smaller heat sinks.
Class D amplifiers typically use an output stage similar to the shown in FIG. 1 (prior art). It includes a power supply block 101 which includes two individual power supplies 108 and 109 to supply positive and negative voltages V+ and V-. These voltages are typically equal in magnitude, but differ in polarity. Power supply block 101 is referenced to ground. The output is also referenced to ground. In general it is desirable to have the output referenced to ground, as this makes radio frequency interference easier to control, and is necessary in some installations. It is also desirable to achieve bipolar (plus and minus) output without the use of a coupling capacitor, especially if low frequency operation is needed, where a very large capacitor would be required.
Power supply 101 supplies a positive and negative voltage. Switch 102 is a single pole double throw (SPDT) switch, generally constructed from fast semiconductor devices, such as field effect transistors. Filter 103 is a low pass filter, designed to pass the audio band frequencies to load 105 (e.g. a speaker or other power device), while removing the switching frequencies. The switching frequency is typically 100 kHz-3 MHz. The duty cycle of the output is varied to produce any desirable output voltage.
When a low frequency, high amplitude signal is amplified, significant energy is passed between the two power supplies 108 and 109. FIG. 2 shows why this occurs. Assume that the power supply outputs V+ and V- are set to plus and minus 64 volts, and that the amplifier is connected to a 4 ohm load 105. Assume that the input signal is requesting a +32 volt output. For simplicity, assume that the switch is perfect, and has no on resistance, infinite off resistance, and switches instantly. The switch waveform necessary to make a 32 volt output will have 102 in the positive position 75% of time, and in the negative position 25% of the time. This is shown as Vs.
FIG. 2b shows the current into the inductor of the low pass filter 103 (shown here as a simple LC section), labeled i.sub.l, and having an average value of 8 Amps. The current ramps up and down somewhat during each cycle, with the exact character of the wave shape determined by the design of low pass filter 103. The power delivered to load 105 is 8 Amps*32 Volts, or 256 Watts. All of the analysis done here is slightly approximated, as the current wave shapes and their averages are modified by the characteristics of the filter, but the results of real world circuits are very close to these approximations, and the above example serves to illustrate the technical difficulties of building switched amplifier systems. In the illustrations, the current is shown as a linear ramp.
The waveform of FIG. 2c shows the current delivered by the positive power supply, which delivers current for 75% of the time. While delivering the current, the average delivered is again 8 Amps, for an overall average of 6 Amps. The power delivered by the supply is therefore 6 Amps*64 Volts, or 384 Watts. The negative supply also delivers current in a positive sense. This is shown in FIG. 2d. The average current is 2 Amps, for a delivered power of 2 Amps*-64 Volts, or -128 Watts.
FIG. 3 illustrates the power flow of the design of FIG. 1. What is happening is that, of the 384 Watts drawn from the positive supply, 256 are delivered to the load, and the other 128 Watts are returned to the negative supply. The power supply must be designed with this in mind, and the supply must be able to deal with the transferred power, by either holding the current in capacitors for future use, dissipating it as heat, or transferring it to the other supply. The first solution requires large capacitors, especially if low frequencies are to be amplified. The second solution is functional, but works in contradiction to the design philosophy of a Class D design, which is to improve efficiency. The third solution requires additional circuitry, increasing cost and complexity.
FIG. 4 (prior art) shows one implementation of the SPDT switch, using power field effect transistors. Transistors 401 and 402 are FETs, diodes 403 and 404 are catch diodes to protect the transistors during the switching period, and circuits 405 and 406 are snubbing networks to control the wave shape during switching. Transformer 400, wired with its outputs complimentary, ensures that exactly one of the transistors is on at any time, and provides the gate drive. In other known designs, the switches may be bipolar transistors, insulated gate bipolar transistors, or other devices. The drive may come from other transformer configurations, level shifters, or optical couplers. Those versed in the art can devise many different implementations of the switch unit.
A need remains in the art for an output stage for Class D amplifiers and the like, that places less demands on its power supply, does not require large de-coupling capacitors and works with a ground referenced output.